We investigate techniques for hiding memory latency on in-order CPU cores. The same techniques that the compilers employ.
All posts tagged instruction level parallelism
When an instruction depends on the previous instruction depends on the previous instructions… : long instruction dependency chains and performance
In this post we investigate long dependency chains: when an instruction depends on the previous instruction depends on the previous instruction… We want to see how long dependency chains lower CPU performance, and we want to measure the effect of interleaving two dependency chains (by interleaving two operations) reflects on software performance. Operations with long…
Instruction-level parallelism in practice: speeding up memory-bound programs with low ILP
We talk about instruction level parallelism: what instruction-level parallelism is, why is it important for your code’s performance and how you can add instruction-level parallelism to improve the performance of your memory-bound program.